The present invention relates to telecommunication systems and, more particularly, to a DC compensation method and apparatus.
In many modem telecommunication systems, e.g., Digital Subscriber Line (DSL) systems, a digital signal processor (DSP) at a user site processes data for transmission to and received from a telephone company central office (TCCO). The data is exchanged between the DSP and the TCCO via a transmission line.
As depicted in FIG. 1, a coder/decoder (CODEC) 10 is positioned between the DSP 20 and the TCCO 30 to convert digital signals from the DSP 20 to analog for transmission to the TCCO 30 over a transmission line 40, and to convert analog signals received from the TCCO 30 over the same transmission line 40 to digital for processing by the DSP 20. The CODEC 10 contains analog circuits which may contribute DC components to signals within the telecommunication system. If not compensated for, these DC components may result in a DC offset on a receive path after analog-to-digital conversion, signals falling outside of the dynamic range of circuits within the CODEC 10, signal degradation, and digital representation errors. Accordingly, methods and apparatuses for compensating for these DC component are useful.
FIG. 2 depicts a typical prior art telecommunication apparatus residing at a user site. The apparatus comprises a DSP 20 for processing digital signals, a CODEC 10 for converting signals between the digital and analog domains, and a known hybrid circuit 25 for converting between unidirectional data flow and bidirectional data flow. In addition, the apparatus comprises capacitors 62, 64, 72, and 74 for filtering out DC components introduced by transmit path and echo cancellation path components within the CODEC 10 and capacitors 42 and 44 for preventing DC components from flowing between the telecommunication apparatus of FIG. 2 and the transmission line 40. Also, capacitors 82, 84 are coupled within the CODEC 10 to remove other DC components found in the receive path within the CODEC 10.
The DSP 20 processes data for transmission over a transmission line 40 (FIG. 1) to a remote processing facility, e.g., a TCCO 30, and processes data received over the same transmission line 40 from the TCCO 30. Also, the DSP 20 typically generates an echo cancellation signal which represents a delayed and specially filtered transmit signal to cancel remote echos on the transmission line 40. For example, the echo cancellation signal cancels echos due to bridge taps and other types of connections on the transmission line 40.
The hybrid circuit 25 is a well known circuit for converting between unidirectional data flowing through the CODEC 10 and bidirectional data flowing on the transmission line 40. The hybrid circuit 25 contains circuitry to prevent transmit signals from interfering with receive signals.
The CODEC 10 comprises circuitry necessary to couple the DSP 20 to a transmission line 40 (FIG. 1). The circuitry comprises an interface 50, an optional amplifier (op-amp) 80, a receive amplifier (RXAmp)/analog filter 85, a digital-to-analog (D/A) converter 60, a D/A converter 70, and an analog-to-digital (A/D) converter 90. In addition, the CODEC 10 comprises capacitors 82, 84 for removing DC components introduced in the receive path of the CODEC 10.
The interface 50 within the CODEC 10 organizes signals to and from the DSP 20 into a transmit path, an echo cancellation path, and a receive path. The RXAmp/analog filter 85 in the receive path amplifies a receive signal from the transmission line to remedy attenuation of the receive signal as it is passed over the transmission line 40, and filters out frequencies which may cause aliasing (i.e., the interpretation of high frequencies as lower frequencies).
The op-amp 80, together with the hybrid circuit 25, reduces the effect of the AC components of the transmit signal and an echo signal on the receive path. Since the receive signal passes over the same transmission line 40 (FIG. 1) as the transmit signal and the echo signal, the receive signal will include images of the transmit signal and the echo signal. If the transmit signal and the echo cancellation signal of the CODEC 10 are applied directly to the input of the op-amp 80 at 180 degrees out of phase with the images of the transmit signal and the echo signal in the receive signal (in this case through the hybrid circuit 25), the effect of the transmit signal and echo signal on the receive signal in the receive path is reduced greatly. The residual signal at the output of the op-amp 80 will contain mostly receive signal.
The CODEC 10, through the use of the D/A converter 60, converts digital signals from the DSP 20 to analog signals for transmission over a transmission line 40 (FIG. 1). Optionally, the CODEC 10 contains another D/A converter 70 for converting echo cancellation signals developed by the DSP 20 from digital-to-analog. In addition, the A/D converter 90 converts analog signals received from the TCCO 30 (FIG. 1) via the transmission line 40 (FIG. 1) to digital signals for processing by the DSP 20.
Due to inherent imperfections of analog circuits, DC components are introduced within the CODEC 10 which contribute to a DC offset after conversion by A/D converter 90. The DC components introduced by the analog circuits within the CODEC alter the voltage level around which the resultant signals are centered. For example, if an analog signal varies between a voltage level of xe2x88x921 V and +1 V for a 0 V DC component, the analog signal would vary between 0V and 2 V for a +1 V DC component, potentially resulting in saturation of the circuit to which this signal is applied. If circuits which are coupled to the analog signals are designed such that their dynamic range is between xe2x88x921 V and +1 V, the dynamic range of the circuit is effectively reduced and may result in digital representation errors. Digital representation errors may occur when a signal with a DC component is converted by an A/D converter such as A/D converter 90 without correcting for the DC component.
The DC components may also result in signal degradation. Signal degradation occurs when analog circuits such as op-amp 80 and RXAmp/analog filter 85 amplify the DC component by a DC gain and introduce their own DC components. Unless neutralized, these DC components will degrade the quality of the receive signal.
Additional components (not shown) within the CODEC provide additional signal processing. An example of a CODEC 10 is found in the data sheets for the 3.3 V Integrated ADSL Over Pots CODEC produced by Texas Instruments, Inc. (part no. TLV320AD11A), incorporate fully herein by reference.
In prior art systems, such as the one depicted in FIG. 2, the DC components are removed through the use of AC coupling capacitors 62, 64, 72, 74, 82, 84 which filter out DC components introduced by analog circuits. Hence, the DC components will not affect the receive signal. Eliminating typical DC components in the transmit path and the receive path, however, requires large AC coupling capacitors 62, 64, 72, 74. The AC coupling capacitors 62, 64, 72, 74 need to be large enough to avoid introducing a noticeable impedance at the frequencies of interest, e.g., typically 25 kHz or higher for an asynchronous digital subscriber line (ADSL). Presently, electrolytic capacitors in the microfarad range are used to remove the DC offset in the transmit and receive paths. In addition, electrolytic capacitors may be used to remove DC components in the receive path.
The electrolytic capacitors which are presently used, however, introduce a non-desirable, non-linear distortion to the system and are too large to be fabricated on a chip. Since the capacitors are too large to be fabricated on a chip, additional printed circuit board (PCB) surface area is required to house external capacitors. In addition, additional pins on the CODEC 10 are required to connect the external capacitors to the CODEC 10, thereby increasing the pin count of the CODEC 10. The increased pin count necessitates a larger chip which further requires additional PCB surface area. The requirement for additional PCB surface area is undesirable since PCB surface area is typically at a premium.
Accordingly, since removing the effect of DC components is necessary, non-linear distortion is non-desirable, and PCB surface area is valuable, there has been a long felt need in the field of the invention for a superior method and apparatus to remove the effect of DC components in a CODEC. The present invention satisfies this need among others.
The present invention provides for a method and apparatus which overcomes the aforementioned problems of removing the effect of DC components due to analog circuits within a coder/decoder (CODEC) by adding a compensation value to an outgoing signal. This arrangement neutralizes the effect of the DC components, thereby removing the need for external AC coupling capacitors. Removing the AC coupling capacitors removes non-linear distortion associated with these components and reduces printed circuit board (PCB) surface area requirements. The PCB surface area requirements are reduced due to the elimination of the PCB surface area reserved for the external AC coupling capacitors and the smaller CODECs which can be produced due to reduced pin requirements.
One aspect of the present invention is a method of compensating for the effect of DC components due to imperfections in analog circuits employed in a CODEC. The method comprises determining a compensation value and adding the compensation value to a path within the CODEC. In a preferred embodiment, the compensation value corresponds to the amount of DC compensation necessary to remove a DC offset. Preferably, the DC offset reported by the A/D conversion process is used to determine the amount of DC compensation necessary to remove the DC offset from a receive path within the CODEC.
Another aspect of the invention is an apparatus to compensate for the effect of DC components due to analog circuits employed in a CODEC. The apparatus comprises an adder coupled in at least one outgoing path of the CODEC, the adder having an input for coupling to a DSP, wherein the DSP determines a DC compensation value to compensate for the effect of DC components and the adder adds the DC compensation value to the outgoing path. Preferably, the DC compensation value is based on a DC offset.